CWE-1342

Extended description

In many processor architectures an exception, mis-speculation, or microcode assist results in a flush operation to clear results that are no longer required. This action prevents these results from influencing architectural state that is intended to be visible from software. However, traces of this transient execution may remain in microarchitectural buffers, resulting in a change in microarchitectural state that can expose sensitive information to an attacker using side-channel analysis. For example, Load Value Injection (LVI) [REF-1202] can exploit direct injection of erroneous values into intermediate load and store buffers. Several conditions may need to be fulfilled for a successful attack: incorrect transient execution that results in remanence of sensitive information; attacker has the ability to provoke microarchitectural exceptions; operations and structures in victim code that can be exploited must be identified.

Common consequences1

• ConfidentialityIntegrityModify MemoryRead MemoryExecute Unauthorized Code or Commands

Potential mitigations2

1. Architecture and DesignRequirementsHigh

   Hardware ensures that no illegal data flows from faulting micro-ops exists at the microarchitectural level.

2. Build and CompilationHigh

   Include instructions that explicitly remove traces of unneeded computations from software interactions with microarchitectural elements e.g. lfence, sfence, mfence, clflush.

Relationships2

• ChildOfCWE-226
• ChildOfCWE-226