CVE-2025-0647

In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.

In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.

En ciertos CPUs Arm, una instrucción CPP RCTX ejecutada en un Elemento de Procesamiento (PE) puede inhibir la invalidación de la TLB cuando se emite una TLBI al PE, ya sea por el mismo PE o por otro PE en el dominio de compartibilidad. En este caso, el PE puede retener entradas TLB obsoletas que deberían haber sido invalidadas por la TLBI.